1. Field of the Invention
The present invention relates to an amplifier circuit and in particular to an amplifier circuit which may be used as a low noise amplifier (LNA) and comprises a gain step circuit.
2. Description of the Related Art
In mobile telecommunications, LNAs are used in the receiver, i.e. for example in a mobile telephone. Depending on the distance between the receiver and the transmitter, the level of the signal arriving at the receiver varies in a wide range. In order to prevent the amplifier to be overridden with a higher input signal level, it is known to use a so-called gain step circuit which may also be referred to as a secondary gain stage and which is switched in parallel to the LNA. The receiver switches the LNA on and the gain step circuit off when a weak signal arrives. This way of operation is typically referred to as a high gain mode. Conversely, the receiver switches the LNA off and the gain step circuit (GS circuit) on when a strong signal is received. This mode of operation is known as the gain step mode. Shifting over between the different modes is realized by the receiver based on a control signal which depends on the sampled level of the input signal.
An exemplary LNA according to the prior art is shown in FIG. 1. The LNA includes a bipolar transistor VT1, whose base terminal is high-frequency coupled to a high-frequency input HFin, where an HF input signal to be amplified is received. The collector terminal of the bipolar transistor VT1, via a resistor VR1 and an inductivity VL1, is connected to a supply voltage terminal to which a supply voltage Vcc may be applied. Further, the collector of the bipolar transistor VT1 is connected to its base terminal via a resistor VR2. The collector of the bipolar transistor VT1 is further high-frequency coupled, via a capacitor VC1, to a high frequency output HFout where the amplified input signal is output. The emitter of the bipolar transistor VT1 is at a reference potential, typically ground. The components of the LNA typically formed on an LNA chip are illustrated in FIG. 1 by the dashed frame 10.
Further, in FIG. 1 an external so-called external LC swamp is shown which is provided in order to improve the IIP3 (input intercept point 3) in order to thereby reduce distortions. The LC swamp includes an external inductivity Lext and an external capacity Cext.
In the LNA shown in FIG. 1, via the coil VL1, serving as an HF choke, and the resistor VR1, the supply voltage is applied to the transistor VT1, wherein the coil VL1 and the resistor VR1 operate as a load for the transistor. The capacitor VC1 serves for a DC decoupling and the resistor VR2 serves for applying a suitable bias to the basis of the bipolar transistor VT1 in order to set the operating point of this transistor.
As it was set out above, in order to prevent the LNA to be overridden, a switchover to a gain step circuit is performed when a strong signal is received at the HF input. Such a gain step circuit should consume as little current as possible and if possible provide a matching as good as the LNA with regard to the input matching and the output matching to the external components. These two problems could not be solved simultaneously up to this day.
In the past, different concepts were realized as gain step circuits. One such concept was to connect a gain step circuit in parallel to the LNA and to provide a decoupling capacitor at the HF input in order to decouple DC signals.
In one integrated solution, however, the substrate resistor of the non-ideal decoupling capacitor represents a load with respect to the performance of the LNA. An alternative concept is to use no separate gain step circuit, but to switch over the LNA in the gain step mode to a level with a negative amplification. This is disadvantageous in so far that when switching over the input/output impedance changes substantially and the LNA in the gain step mode is no longer matched. A third alternative concept was to use a gain step circuit in parallel to the LNA which is set up identically to the LNA, comprises, however, a substantially lower amplification. The power consumption of the gain step circuit in a range from 5 to 10 mA is equal to the power consumption of the LNA, i.e. the high gain stage, so that in switching over between the stages the input/output impedance remains the same for a good matching. Such a high power consumption in the gain step mode is not desirable, however.